Yasp and AMD: Unlocking High-Performance AI Inference on AMD Radeon™ PRO V710 GPUs

The Challenge

AI inference performance is shaped not only by the GPU, but by how effectively software can translate a model into operations that take advantage of that hardware.

Today, much of the AI ecosystem is optimized around a relatively narrow set of hardware and compiler paths. Moving workloads to alternative GPUs can therefore require engineering effort, model changes, or performance tradeoffs that reduce the economic benefit of using lower-cost infrastructure.

Traditional compiler optimization approaches only partially solve this problem. They search a predefined set of implementation choices and typically converge on a strong, but not necessarily optimal, result. This can leave meaningful hardware performance untapped.

The challenge is therefore broader than making an individual kernel faster: can AI workloads move across hardware platforms without forcing developers to trade off performance, portability, or cost?

To evaluate this, we tested three representative AI workloads with different computational characteristics:

• RegNet, representing convolutional neural network workloads
• DeepSeekV3 MLA, representing modern LLM attention mechanisms
• MiniGPT Block, representing an end-to-end transformer block
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We compared performance and infrastructure economics across AMD and NVIDIA GPU configurations available on Microsoft Azure.

The Solution

yasp.compile uses an agentic approach to compilation. Rather than relying on a fixed optimization strategy, it autonomously explores ways to execute a model efficiently on the target hardware and generates optimized GPU kernels for that environment.

For developers, the important distinction is that this optimization happens beneath the model layer.

Teams can continue working with standard PyTorch models while yasp.compile adapts execution to the target GPU. There is no requirement to rewrite the model around vendor-specific kernels or manually tune individual operations.

On the AMD Radeon PRO V710 GPU, the compiler automatically applies optimizations such as operation fusion, precision selection, efficient memory access, and hardware-aware execution strategies.

This creates a simpler deployment model:

Standard PyTorch model → yasp.compile → hardware-optimized deployment

The result is a layer of portability between the AI model and the underlying accelerator. Instead of hardware choice dictating application architecture, the compiler adapts the workload to the infrastructure.

We deployed this approach on Azure NVads V710 PRO virtual machines and compared it with the conventional NVIDIA A10 deployment path using torch.compile.

The Impact

The results demonstrate that compiler intelligence can materially change the economics of GPU infrastructure.

Across the workloads tested, yasp.compile enabled the AMD Radeon PRO V710 GPU to deliver competitive or superior inference performance while running on a lower-cost Azure VM.

The infrastructure comparison was:

• AMD Radeon PRO V710 with yasp.compile: approximately $2.00/hour
• NVIDIA A10 with torch.compile: approximately $3.20/hour
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This represents a substantially lower hourly infrastructure cost before accounting for any additional gains from workload-level performance improvements.

More importantly, the study demonstrates three broader impacts.

Hardware choice becomes more flexible

Organizations are less constrained by the software optimization available for a particular GPU vendor. The same model can be targeted to different hardware while the compiler handles much of the underlying optimization.

Better hardware utilization improves inference economics

Cloud GPU costs compound rapidly at production scale. Improving the amount of useful inference work produced by each GPU-hour can translate directly into lower serving costs and better infrastructure efficiency.

The impact therefore extends beyond benchmark latency. What matters operationally is the combination of performance and cost per unit of inference.

Optimization moves from manual engineering to automation

Traditionally, extracting maximum performance from a new GPU architecture requires specialized kernel engineering and vendor-specific expertise.

Agentic compilation shifts more of that work into software.

Instead of engineering teams repeatedly optimizing models for each new hardware target, the compiler can search for efficient implementations automatically. This reduces the effort required to evaluate new accelerators and makes infrastructure decisions less dependent on low-level optimization expertise.

Taken together, these results point toward a different model for AI infrastructure: models remain portable, compilers become adaptive, and organizations gain more freedom to choose hardware based on performance and economics rather than software lock-in.

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